eeprom version D483021130199

---------------------------------------------------------------------------
Updated 20001214 PA1
Editor UABPDAN
Added writes to Broadcom PHY according to Martins list of writes to different registers after reset.
This version have the BC fix divided into different parts of the prom file. 
Dummy writes have been implemented between the writes towards the -5401.

---------------------------------------------------------------------------
Last Updated 20010216 rev: A
The R1A version is the same as PA1.
Stored in GASK 010216.

---------------------------------------------------------------------------
Last Updated 20010405 rev: B
Editor UABPDAN

Fix the Fifo parameteres Register (offset 1754) so that all devices will be written to not just hz1 and hz2.
Changed reg0718 and 0728 in the -303 so that port 5 is enabled.
Disabled forec link on -360. Bit(13) in PCR0 
Enabled the watchdog by setting bit[0] in Global Control Register (offset 1500).
Enabled the HOL funtcion on all ports all divices by changing HOL Register (offset 1748).
Stored in GASK 20010405.
---------------------------------------------------------------------------
Last Updated 20011011 rev: C
Editor SEPALMAR QABMANO
Changed memory size for MAC-addresses from 8K to 4K.
FIFO Parameters for GT-48350 (offset 0x1754) bit (15:14) from 11=8K to 10=4K.
Global Control Register for GT-48360 (offset 0x1500) bit (10) from 1=8K to 0=4K.

Changed following registers due to Galileo Technology recommends:
G.Link_Buf_Threshold<RxBufThr_GHIGH>=21
G.Link_Buf_Threshold<RxBufThr_GLOW>=14
G.Link_Buffer_Threshold_Extend<G_GlobalBufThr>=37
Rx_Buffer_Threshold<RxBufThr>=40

GT-48303A-EV (BUDGET HEX) EEPROM CONTENTS: 
====================================

*** NOTE: GCR must be placed at the end to enable all ports

---------------------------------------------------------------------------
PCI Configuration: Status and Command Register (offset 0004)
[2] MasEN = 1 Configure GT-48300 to act as a master on the PCI
* main reason is to force the GT-48300 to drive the AD/CBE busses


# offset 0004 0x02800004
offset 0004 0x00000000

Budget Registers - Default setting
----------------
offset 0704     00000000000000000000000000000001   Port 0 device table
offset 0708     00000000000000000000000000000010   Port 1 device table
offset 070C     00000000000000000000000000000100   Port 2 device table
offset 0710     00000000000000000000000000001000   Port 3 device table
offset 0714     00000000000000000000000000010000   Port 4 device table
offset 0718     00000000000000000000000000100000   Port 5 device table - Glink for extension
offset 0728     00000000000000000000000000111111
---------------------------------------------------------------------------





GT_EV-48310B_9781_B1 EEPROM (RMII): 09/01/00 
==================================================



Port Control Register - PCR0 (offset 0000)
*******************************************
[0]     PortEn           = 1 (Enabled)
[1]     FullDuplex       = 0 (Half Duplex) (350)
[1]            En_Dyn_Int_Sel       = 1 (Enabled)     [360]
[2]     TrunkEn          = 0 (Not trunk)
[3]     Over_Priority    = 0 (Do not ovveride)
[4]     Default_Prior    = 0 (Loe priotity)
[5]     En_Aneg_duplex      = 0 (Enabled)(350)
[6]     Flow_Control     = 1 (Enabled)(350)
[6,5]         InterfaceMode          = 10(GMII)    (360)
[7]     Back_Pressure    = 1 (Enabled)(350)
[7]     Reserved         = 0           (360)
[8]     FilBroadcast     = 0 (Disabled)
[9]     Locked           = 0 (Port is no locked)
[10]    En_Drop_on_lock  = 0 (Do not drop)
[11]    ForwUnk          = 0 (Disabled)
[12]    SpanEn           = 0 (Disabled)
[13]    ForceLink        = 1 (Do force link) (350)
[14]    1536             = 1 (Enabled)
[26:15] Default_Vlan_id  = 000000000001
[30:27] SA_Low           = 0000 (Port number)
[31]    Enable_Autoneg_FC= 0 (Enable)
[31]    En_TypeOfService = 0 (Disable)

guide line          33222222222211111111110000000000
                          10987654321098765432109876543210
offset 0000 hz0 00000000000000001110000001000011 PCR0 0xE043
offset 0000 hz1 00000000000000001110000011000001 PCR0
offset 0000 hz2 00000000000000001110000011000001 PCR0
offset 0000 hz3 00000000000000001110000011000001 PCR0
offset 0000 hz4 00000000000000001110000011000001 PCR0
PCR1 
[30:27] 0001  <- port number

PCR2 
[30:27] 0010  <- port number

PCR3 
[30:27] 0011  <- port number

PCR4 
[30:27] 0100  <- port number

PCR5 
[30:27] 0101  <- port number

PCR6
[30:27] 0110  <- port number

PCR7 
[30:27] 0111  <- port number


guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 0004 hz1 00000000000000001110000011000001 PCR1
offset 0200 hz1 00000000000000001110000011000001 PCR2
offset 0204 hz1 00000000000000001110000011000001 PCR3
offset 0400 hz1 00000000000000001110000011000001 PCR4
offset 0404 hz1 00000000000000001110000011000001 PCR5
offset 0600 hz1 00000000000000001110000011000001 PCR6
offset 0604 hz1 00000000000000001110000011000001 PCR7

guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 0004 hz2 00000000000000001110000011000001 PCR1
offset 0200 hz2 00000000000000001110000011000001 PCR2
offset 0204 hz2 00000000000000001110000011000001 PCR3
offset 0400 hz2 00000000000000001110000011000001 PCR4
offset 0404 hz2 00000000000000001110000011000001 PCR5
offset 0600 hz2 00000000000000001110000011000001 PCR6
offset 0604 hz2 00000000000000001110000011000001 PCR7

guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 0004 hz3 00000000000000001110000011000001 PCR1
offset 0200 hz3 00000000000000001110000011000001 PCR2
offset 0204 hz3 00000000000000001110000011000001 PCR3
offset 0400 hz3 00000000000000001110000011000001 PCR4
offset 0404 hz3 00000000000000001110000011000001 PCR5
offset 0600 hz3 00000000000000001110000011000001 PCR6
offset 0604 hz3 00000000000000001110000011000001 PCR7

guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 0004 hz4 00000000000000001110000011000001 PCR1
offset 0200 hz4 00000000000000001110000011000001 PCR2
offset 0204 hz4 00000000000000001110000011000001 PCR3
offset 0400 hz4 00000000000000001110000011000001 PCR4
offset 0404 hz4 00000000000000001110000011000001 PCR5
offset 0600 hz4 00000000000000001110000011000001 PCR6
offset 0604 hz4 00000000000000001110000011000001 PCR7


---------------------------------------------------------------------------

Port Control Extend Register - PCR0 (offset 0010)  (350)
**************************************************
[0]     Phy_Speed        = 1 (100Mbps)
[1]     En_Phy_speed     = 0 (Enable update)
[2]     Inchk            = 0 (Disable Ingress filtering)
[3]     Protocol_En      = 0 (Disabled)
[5:4]   Protocol_Bits    = 0 
[6]     Reserved         = 0
[7]     Extended_Rmon    = 0 (Disabled) 
[8]     En_Limit4        = 0 (Enabled regard of the Limit4 pin)
[11:9]  VPT_prio0                = 0
[14:12] VPT_prio1        = 0
[22:14] VPT2prio                         = 0
[23]    En_tos2_prio     = 0
[31:24] Reserved         = 0


guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 0010 hz1 00000000000000000000000000000001 PCREXT0
offset 0014 hz1 00000000000000000000000000000001 PCREXT1
offset 0210 hz1 00000000000000000000000000000001 PCREXT2
offset 0214 hz1 00000000000000000000000000000001 PCREXT3
offset 0410 hz1 00000000000000000000000000000001 PCREXT4
offset 0414 hz1 00000000000000000000000000000001 PCREXT5
offset 0610 hz1 00000000000000000000000000000001 PCREXT6
offset 0614 hz1 00000000000000000000000000000001 PCREXT7

guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 0010 hz2 00000000000000000000000000000001 PCREXT0
offset 0014 hz2 00000000000000000000000000000001 PCREXT1
offset 0210 hz2 00000000000000000000000000000001 PCREXT2
offset 0214 hz2 00000000000000000000000000000001 PCREXT3
offset 0410 hz2 00000000000000000000000000000001 PCREXT4
offset 0414 hz2 00000000000000000000000000000001 PCREXT5
offset 0610 hz2 00000000000000000000000000000001 PCREXT6
offset 0614 hz2 00000000000000000000000000000001 PCREXT7

guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 0010 hz3 00000000000000000000000000000001 PCREXT0
offset 0014 hz3 00000000000000000000000000000001 PCREXT1
offset 0210 hz3 00000000000000000000000000000001 PCREXT2
offset 0214 hz3 00000000000000000000000000000001 PCREXT3
offset 0410 hz3 00000000000000000000000000000001 PCREXT4
offset 0414 hz3 00000000000000000000000000000001 PCREXT5
offset 0610 hz3 00000000000000000000000000000001 PCREXT6
offset 0614 hz3 00000000000000000000000000000001 PCREXT7

guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 0010 hz4 00000000000000000000000000000001 PCREXT0
offset 0014 hz4 00000000000000000000000000000001 PCREXT1
offset 0210 hz4 00000000000000000000000000000001 PCREXT2
offset 0214 hz4 00000000000000000000000000000001 PCREXT3
offset 0410 hz4 00000000000000000000000000000001 PCREXT4
offset 0414 hz4 00000000000000000000000000000001 PCREXT5
offset 0610 hz4 00000000000000000000000000000001 PCREXT6
offset 0614 hz4 00000000000000000000000000000001 PCREXT7


Port Control Extend Register - PCR0 (offset 0010)  (360)
**************************************************
[0]     Rx_Dv_Expand     = 0 
[1]     Reserved         = 1 check with Galileo
[2]     Inchk            = 0 
[3]     Protocol_En      = 0 
[5:4]   Protocol_Bits    = 0 
[6]     Reserved         = 0
[7]     Extended_Rmon    = 0 (Disabled) 
[8]     En_Limit4        = 0 (Enabled regard of the Limit4 pin)
[14:9]                                        = 11111
[15:19] Reserved                         = 00000
[20]    Reserved         = 1
[21]    EWRAP                     = 0
[24:22] Reserved                          = 0
[25]    restart_an                       = 0
[26]    fdx_adv                           = 0
[27]    pause_adv                     = 0
[28]    an_bypass_en               = 0
[31:29] Reserved                         = 0
 
guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 0010 hz0 00000000000100000011111000000010 0x00103e01

---------------------------------------------------------------------------

--------------------------------------------------------------------------- 


CPU parameters Register (offset 0x175c (-350) and 0x1760 (-360))
*************************************
[0]     Dis_recovery_Cpu = 1(No Recovery)
[1-31]                   = 0
 
guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 1760 hz0 00000000000000000000000000000001 
offset 175c hz1 00000000000000000000000000000001 
offset 175c hz2 00000000000000000000000000000001  
offset 175c hz3 00000000000000000000000000000001 
offset 175c hz4 00000000000000000000000000000001 
--------------------------------------------------------------------------- 

Fifo parameteres Register (offset 1754)
****************************************
offset 1754 hz1 0x9A89110 
offset 1754 hz2 0x9A89110 
offset 1754 hz3 0x9A89110 
offset 1754 hz4 0x9A89110 
---------------------------------------------------------------------------
offset 1720 hz0 0x30104028 
offset 1720 hz1 0x67A1031C 
offset 1720 hz2 0x67A1031C 
offset 1720 hz3 0x67A1031C 
offset 1720 hz4 0x67A1031C 
---------------------------------------------------------------------------
offset 1724 hz0 0x3A441C15 
---------------------------------------------------------------------------
offset 1768 hz0 0x00000025 

Aging Register  (offset 1704)
[0]     Aging_Trigger    = 0
[2:1]   Aging_Mode       = 1 (Automatic aging)
[8:3]   Aging_Timer      = 001111 (Default)
[13:9]  Reserved         = 01000 (must be 8)
[24:14] Scrub_Limit      = 00000100000 (Default)
[26:25] Scrub_Timer      = 00 (1 second)
[27]    Fast_Aging       = 0 (Normal aging mode)
[28]    Buffer_Aging     = 0 ( Disabled)
[31:29] Reserved         = 000

guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 1704 hz0 00000000000010000001000001111010 Aging register
offset 1704 hz1 00000000000010000001000001111010 Aging register
offset 1704 hz2 00000000000010000001000001111010 Aging register
offset 1704 hz3 00000000000010000001000001111010 Aging register
offset 1704 hz4 00000000000010000001000001111010 Aging register
---------------------------------------------------------------------------

HOL Register (offset 1748)
***************************
[6:0]   TxQueThr         = 0000011 (64 packets)
[7]     HOL_Port0        = 1 (Enabled)
[8]     HOL_Port1        = 1 (Enabled)
[9]     HOL_Port2        = 1 (Enabled)
[10]    HOL_Port3        = 1 (Enabled)
[11]    HOL_Port4        = 1 (Enabled) 
[12]    HOL_Port5        = 1 (Enabled)
[13]    HOL_Port6        = 1 (Enabled)
[14]    HOL_Port7        = 1 (Enabled)
[31:15] Reserved         = 0

guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 1748 hz0 00000000000000000111111110000011 HOL register
offset 1748 hz1 00000000000000000111111110000011 HOL register
offset 1748 hz2 00000000000000000111111110000011 HOL register
offset 1748 hz3 00000000000000000111111110000011 HOL register
offset 1748 hz4 00000000000000000111111110000011 HOL register
---------------------------------------------------------------------------


Led Override Register (offset 1708)
***********************************
guide line          33222222222211111111110000000000
                          10987654321098765432109876543210
offset 1708 hz0 0x01FE01C2
offset 1708 hz1 0x01FE0111
offset 1708 hz2 0x01FE0132
offset 1708 hz3 0x01FE0173
offset 1708 hz4 0x01FE01F4
--To display Link+Duplex

---------------------------------------------------------------------------

Global Control Register (offset 1500)
***************************************
[0]      Dis_Watchdog    = 1 (WD enabled).
[1]      EnableDevice    = 1 (device enabled).
[2]      Mode            = 0 (Basic Mode).
[4:3]    Reserved        = 00 .
[5]      ForwdNewAdd     = 0 (Do not forward NA to CPu).
[6]      RecoveryEnable  = 1 (Enabled).
[7]      Reserved        = 1                        (350)
[7]      IBM_ht_func     = 1 (normal mode)          (360)
[8]      CPUEna          = 0 (CPU does not exists). 
[9]      IGMPEn          = 0 (Multicast Forwarding).
[10]     HT-size         = 0 (4k address table) (360)
[10]     Reserved        = 1 (350)
[11]     Partition       = 1 (enabled).
[24:12]                  = 0000000000000.
[25]     Ledmode         = 0 (Mode 0).
[26]     Skip init       = 1 (do not skip init).
[31:27]                  = 00000.

guide line      33222222222211111111110000000000
                10987654321098765432109876543210
offset 1500 hz0 00000100000000001000000010000011 (0x04008083)
offset 1500 hz1 00000100000000001000010010000011 (0x04008483)
offset 1500 hz2 00000100000000001000010010000011
offset 1500 hz3 00000100000000001000010010000011
offset 1500 hz4 00000100000000001000010010000011
---------------------------------------------------------------------------


 
SMI Register (offset 173c)   (360)
This will write to Broadcom Gigabit PHY.
Values from Martin at Broadcom.
***************************************
[15:0]		DATA		= The values written to BC PHY registers.
[20:16]		PhyAdr		= Gigabit Phy address = 10000 (bin)
[25:21]		RegAdr		= Register Address in BC Gb Phy
[26]		OpCode		= Read/Write, Read = 1 & Write = 0
[27]		ReadValid	= Indicates if a read operation is completed
[28]		Busy		= Indicates if an operation is in progress
[31:29]		N/A		= Should be 000. 

DATA-------------------------------------|                                         |
PhyAdr------------------------|          |
RegAdr-------------------|    |	     |
Read/Write------------|  |    |	     |
		          |  |    |          |
		          ||---||---||--------------| 	
guide line       33222222222211111111110000000000
                 10987654321098765432109876543210
offset 173c hz0  00000011000000010000110000100000 (Write 0x0c20 to adr 0x18 in the GbPhy, 0x3010C20)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010

                10987654321098765432109876543210
offset 173c hz0 00000010111000010000000000010010 (Write 0x0012 to adr 0x17 in the GbPhy, 0x2E10012)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010

                10987654321098765432109876543210
offset 173c hz0 00000010101000010001100000000100 (Write 0x1804 to adr 0x15 in the GbPhy, 0x2A11804)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010

                10987654321098765432109876543210
offset 173c hz0 00000010111000010000000000010011 (Write 0x0013 to adr 0x17 in the GbPhy, 0x2E10013)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010

                10987654321098765432109876543210
offset 173c hz0 00000010101000010001001000000100 (Write 0x1204 to adr 0x15 in the GbPhy, 0x2A11204)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010


guide line       33222222222211111111110000000000
                10987654321098765432109876543210
offset 173c hz0 00000010111000011000000000000110 (Write 0x8006 to adr 0x17 in the GbPhy, 0x2E18006)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010

                10987654321098765432109876543210
offset 173c hz0 00000010101000010000000100110010 (Write 0x0132 to adr 0x15 in the GbPhy, 0x2A10132)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010

                10987654321098765432109876543210
offset 173c hz0 00000010111000011000000000000110 (Write 0x8006 to adr 0x17 in the GbPhy, 0x2E18006)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010

                10987654321098765432109876543210
offset 173c hz0 00000010101000010000001000110010 (Write 0x0232 to adr 0x15 in the GbPhy, 0x2A10232)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010

                10987654321098765432109876543210
offset 173c hz0 00000010111000010010000000011111 (Write 0x201F to adr 0x17 in the GbPhy, 0x2E1201F)

Dummy write so the 360 have time to do SMI writes towards BC-5401
offset 1500 hz1 00000100000000001000010010000010
offset 1500 hz1 00000100000000001000010010000010

                10987654321098765432109876543210
offset 173c hz0 00000010101000010000101000100000 (Write 0x0A20 to adr 0x15 in the GbPhy, 0x2A10A20)
	

---------------------------------------------------------------------------

SMI Register (offset 173c)   (360)
BC Gigabit: PHY Extended Control Register Adr: 0x10
This will write to Broadcom Gigabit PHY.
***************************************
THIS WILL TURN ON ALL LED's

***BC Gigabit Phy Address
[0]			dc, default		= 0
[1]			ThreeLink		= 1 after reset
[2]			dc, default		= 0
[3]			Force Leds off	= 0
[4]			Force Leds on	= 1
[5:14]		Div., default	= 0
[15]			MAC/PHY		= 0
[20:16]		PhyAdr		= Gigabit Phy address = 11110 (bin)
[25:21]		RegAdr		= 0x10, 10000
[26]			OpCode		= Read/Write, Read = 1 & Write = 0
[27]			ReadValid		= Indicates if a read operation is completed
[28]			Busy			= Indicates if an operation is in progress
[31:29]		N/A			= Should be 000. 

DATA------------------------------------|
                                        |
PhyAdr-----------------------|          |
RegAdr------------------|    |          |
Read/Write-----------|  |    |	    |
		         |  |    |          |
		         ||---||---||--------------| 	
guide line      33222222222211111111110000000000
                  10987654321098765432109876543210
# offset 173c hz0 00000010000000010000000000010010 ) 



---------------------------------------------------------------------------
